Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network-MedSci.cn

Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network

Chaurasiya, RB; Shrestha, R

Shrestha, R (通讯作者)，IIT Mandi, Sch Comp & Elect Engn, Mandi 175005, Himachal Prades, India.

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022; 30 (2): 166

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