Wafer-Scale Statistical Analysis of Graphene FETs-Part I: Wafer-Scale Fabrication and Yield Analysis

Smith, AD; Wagner, S; Kataria, S; Malm, BG; Lemme, MC; Ostling, M

Smith, AD (reprint author), KTH Royal Inst Technol, Dept Integrated Devices & Circuits, S-16440 Kista, Sweden.

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017; 64 (9): 3919

Abstract

Wafer-scale, CMOS compatible graphene transfer has been established for device fabrication and can be integrated into a conventional CMOS process flow......

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