PIR-DSP: An FPGA DSP block Architecture for Multi-Precision Deep Neural Networks

Rasoulinezhad, S; Zhou, H; Wang, LL; Leong, PHW

Rasoulinezhad, S (reprint author), Univ Sydney, Sch Elect & Informat Engn, Sydney, NSW 2006, Australia.

2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 2019; (): 35

Abstract

Quantisation is a key optimisation strategy to improve the performance of floating-point deep neural network (DNN) accelerators. Digital signal proces......

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